SI5348A-B-GMR Overview
As a clock IC, it is packaged by the Tape & Reel (TR) method. The 64-VFQFN Exposed Pad package embeds this Clock PLL. The frequency generator is capable of withstanding a maximum temperature of NOT SPECIFIED during reflowing. There is a Clock PLL called LVCMOS, LVDS, LVPECL which is designed to be the input to this clock generator. Using 1 circuits, the electronic part's full performance can be accessed. RF synthesizers based on this clock provide frequencies up to 710.4MHz maximum. A Surface Mount-shaped electrical component makes it convenient to mount on a panel. As determined by the test statistics, the ambient temperature should be set to -40°C~85°C. In this case, we are dealing with a frequency synthesizer that can be used with CML, HCSL, LVCMOS, LVDS, LVPECL logic levels. TELECOM CIRCUITTdigital clock generator with hitless switching, holdover, and jitter.
SI5348A-B-GMR Features
Available in the 64-VFQFN Exposed Pad

SI5348A-B-GMR Applications
There are a lot of Silicon Labs
SI5348A-B-GMR Clock Generators applications.

Picocells, femtocells and small cells
Sampling clocks for ADC and DAC
1 Gigabit Ethernet
10 Gigabit Ethernet
FPGA and processor clocks
Line cards used in telephone exchange
Fiber Channel
PCI express cards
Infotainment systems
Medical equipment

Factory Lead Time	4 Weeks
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	64-VFQFN Exposed Pad
Operating Temperature	-40°C~85°C
Packaging	Tape & Reel (TR)
Published	2015
Pbfree Code	yes
Part Status	Not For New Designs
Moisture Sensitivity Level (MSL)	2 (1 Year)
Peak Reflow Temperature (Cel)	NOT SPECIFIED
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
Output	CML, HCSL, LVCMOS, LVDS, LVPECL
Number of Circuits	1
Frequency (Max)	710.4MHz
Input	LVCMOS, LVDS, LVPECL
Ratio - Input:Output	5:7
PLL	Yes
Differential - Input:Output	Yes/Yes
Telecom IC Type	TELECOM CIRCUIT
Divider/Multiplier	Yes/No
RoHS Status	RoHS Compliant